Transmitters

Transmitter drive circuits

The transmitter drive circuits may consist of:

The frequency multiplier chain
Table 4.1 lists the limits of the original HF amateur bands, ie up to 30MHz, and the harmonic relationship between these bands.

It will be seen from Table 4.1 that the output of a VFO which is tuneable over a frequency range of 1.75MHz to 2MHz can be multiplied to produce frequencies in all bands up to 28MHz.

It should be noted that any undesired change in the frequency of the VFO is also multiplied in the frequency multiplier circuit; in the worst case by a factor of 16, ie 1.8MHz to 28MHz.

It is particularly important to prevent the radiation of the harmonics other than the required one in this arrangement.

Table 4.1. Harmonically related HF bands

Limits of HF bands (kHz) Equivalent to
1810-2000 1810-2000 x 1
3500-3800 1750-1900 x 2
7000-7100 1750-1775 x 4
14,000-14,350 1750-1794 x 8
21,000-21,450 1750-1787 x 12
28,000-29,700 1750-1856 x 16

Harmonics of frequencies in the HF amateur bands will occur around 42Mhz, 56MHz and 63MHz. These are liable to cause breakthrough to radio services operating near these frequencies. The frequency multiplier chain cannot be extended to include the WARC bands, ie 10MHz, 18MHz and 24MHz, because these bands are not in harmonic relationship to each other or to the original bands. This circuit is rarely is now rarely used commercially, but it provides a simple solution for the home constructor who is interested only in CW operation on the original HF bands.


The mixer-VFO circuit

Coverage of all the HF bands can be achieved by mixing the outputs of a VFO and a fixed-frequency (crystal) oscillator.

By the use of a crystal of the appropriate frequency this circuit, generally known as a 'mixer VFO', can produce an output at almost any frequency. Harmonic relationship is not necessary as the desired frequency is the result of the addition of two frequencies and not the multiplication of one (see Fig4.2).

picture

Fig 4.2. Basic block diagram of a mixer-VFO

Typically the frequency coverage of the VFO would be 500kHz in the range of 3MHz to 8MHz. Any unwanted change in the frequency of the VFO remains the same at all output frequencies because it is not multiplied as in the arrangement of Fig 4.2. Thus the overall frequency stability is significantly improved.

For reasons which will be explained later in this chapter, the mixer VFO must be used in an SSB transmitter.


The frequency synthesiser

The term 'frequency synthesiser' has been applied to the mixer VFO just described, but today it normally implies a complex circuit which can produce a large number of equally spaced frequencies, the basic stability of which is determined by a single quartz crystal.

Such a circuit could replace the VFO or the local oscillator as the controlling frequency source in a transmitter and/or receiver in a communication system utilising a large number of equally spaced frequency channels. These systems are widely used in aeronautical, mobile or amateur communication, particularly at VHF and UHF.

picture

Fig 4.3. Basic block diagram of a phase-locked loop

The basis of the frequency synthesiser is a 'phase-locked loop' (PLL). This is an electronic feedback loop and is shown in outline in Fig 4.3.

A voltage-controlled oscillator (VCO) is an oscillator whose frequency can be controlled by the variation of a voltage, eg variation of the frequency of an L-C oscillator by a varactor diode. The VCO frequency fO is fed back to a phase detector circuit in which it is compared with a reference frequency fr. The output of the phase detector is an 'error' voltage. This is a varying direct voltage which is proportional to the difference in frequency and phase between fr and fO. The error voltage is filtered to remove any high-frequency components from the output of the phase detector and is then fed back to the VCO where it causes the VCO frequency to change in order to reduce the difference betweenfr and fO . This process continues until the two frequencies are equal. The loop is then said to be 'phase locked'. The phase-locked loop may be used in conjunction with a conventional oscillator to provide a frequency stability which is greater than that of the oscillator itself. However, when it is used with a 'divide-by-n counter', it becomes the basis of the frequency synthesiser.

A divide-by-n counter is a digital logic integrated circuit which produces a single output pulse for every n input pulses; n of course is a whole number. Many counters are available, capable of dividing by fixed ratios according to the way in which they are connected. These can be connected in cascade to give greater ratios, ie ÷10, ÷6 and ÷5 counters in cascade will divide by 300 (10 x 6 x 5). A more useful version is the programmable counter which typically can divide by any number between 1 and 10 according to whether the appropriate pin on the IC is grounded or not.

A basic block diagram of a frequency synthesiser is shown in Fig 4.4. The reference frequency is obtained from a low-frequency crystal oscillator (typically 1MHz to 5MHz) followed by a divider. By selection of the divide ratio of the reference frequency divider and the programmable divider in the feedback loop, a stable and programmable output frequency is obtained. This output frequency cannot be adjusted in a continuous manner as in a VFO but is tuned in a number of discrete steps. In FM equipment it is convenient to make these steps equal to the channel spacing, ie 25 or 12.5kHz. In the case of an SSB transceiver the step needs to be much smaller in order to ensure that the signal can be recovered correctly. 100Hz should be regarded as the maximum step size on SSB unless some other form of fine tune is available.

The actual programming of a frequency synthesiser is achieved in a number of ways, from simple switches to microcomputers. Tuning knobs coupled to electro-mechanical or mechanical-optical switches are also used to simulate conventional tuning. The method used depends upon the complexity and hence price of the equipment. The actual frequency is shown on a digital display.

picture

Fig 4.4. Basic block diagram of a frequency synthesiser.

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